LCD_DMACTL_FIFORDY=LCD_DMACTL_FIFORDY_8
LCD DMA Control
LCD_DMACTL_FMODE | Frame Mode |
LCD_DMACTL_BIGDEND | Big Endian Enable |
LCD_DMACTL_BYTESWAP | This bit controls the bytelane ordering of the data on the output of the DMA module |
LCD_DMACTL_BURSTSZ | Burst Size setting for DMA transfers (all DMA transfers are 32 bits wide): 2 (LCD_DMACTL_BURSTSZ_4): burst size of 4 3 (LCD_DMACTL_BURSTSZ_8): burst size of 8 4 (LCD_DMACTL_BURSTSZ_16): burst size of 16 |
LCD_DMACTL_FIFORDY | DMA FIFO threshold 0 (LCD_DMACTL_FIFORDY_8): 8 words 1 (LCD_DMACTL_FIFORDY_16): 16 words 2 (LCD_DMACTL_FIFORDY_32): 32 words 3 (LCD_DMACTL_FIFORDY_64): 64 words 4 (LCD_DMACTL_FIFORDY_128): 128 words 5 (LCD_DMACTL_FIFORDY_256): 256 words 6 (LCD_DMACTL_FIFORDY_512): 512 words |